MAOJET TECHNOLOY CORP. 茂積股份有限公司

	EDA tools
	System Design and Verification Debug Analysis Formal and Static Verification Planning and Management Simulation and Testbench Software-Driven Verification Verification IP Digital Design and Signoff Equivalence Checking Low-Power Validation Synthesis Power Analysis SDC and CDC Validation Silicon Signoff Test Custom IC / Analog / RF Design Library Characterization Circuit Design Circuit Simulation Electrically Aware Design Layout Design Layout Verification RF Design Variation-Aware Design Modeling IC Package Design and Analysis IC Package Design SI/PI Analysis Integrated Solution SI/PI Analysis Point Tools Cross-Platform Co-Design and Analysis PCB Design and Analysis Design Authoring PCB Layout Library and Design Data Management Analog/Mixed-Signal Simulation SI/PI Analysis Integrated Solution SI/PI Analysis Point Tools Others PCB manufacturing tooling and analysis Failure Analysis
	IP solutions

System Design and Verification > Planning and Management

	vManager Metric-Driven Signoff Platform	Cadence Design Systems, Inc.