The new sound of analog design


Key Benefits 

   •   Circuit exploration of analog, mixed-signal, and RF IC designs made
       easy

   •   Extensive design exploration, simulation, and verification

   •   Analog specification-verification cockpit

   •   A new level of statistical analysis for high-yield and advanced-node
       designs


With the emergence of new ISO standards, advanced-node designs, and the requirements
for system design enablement, analog engineers are experiencing difficulty maximizing
productivity and predictability while meeting aggressive time-to-market deadlines. The
Cadence® Virtuoso® ADE product suite offers unparalleled performance and ease-of-use
features that set the new standard for quality custom design, analysis, and verification.

The new Virtuoso ADE product suite enables designers to fully explore, analyze, and verify
a design against design goals so that they can maintain design intent throughout the design
cycle. As the industry’s leading solution for analog simulation control and management, the
Virtuoso ADE product suite allows you to flexibly select the product(s) that best support your
design goals as you move through the design flow.


Virtuoso ADE Explorer

The Virtuoso ADE Explorer allows you to more easily explore the initial stages of your design
with:

   •   Spectre® checks supported for detecting and reporting circuit problems during simulation

   •   Real-time tuning for fast and accurate pinpointing of your design specifications

   •   Pass/fail datasheets

   •   Complete corners and Monte Carlo statistical environment for detecting and fixing variation
        problems before they sink your circuit


Virtuoso ADE Assembler

Using the Virtuoso ADE Assembler, analyze the various conditions of your circuit with an
environment that approaches design and analysis from a specification-driven point of view:

   •   Quickly test your circuits’ multiple specifications across corners, multiple stimulus
        testbenches, and statistical variance

   •   Added mini-run plans easily create conditional and dependent simulations

   •   Design migration with technology re-targeting

   •   Built-in advanced statistical features such as worst-case corner development

   •   Optional Virtuoso Variation Option for customers needing to do advanced-node statistics
        (16nm and below), statistical sensitivity, and high-yield estimation of greater than 3
        sigma


Virtuoso ADE Verifier

Get a global view of the circuit status with the Virtuoso ADE Verifier, and easily verify that
all the moving pieces of the analog design are contributing to the overall design specifications
set by your chip architect. Manual attempts to do this work often lead to mistakes since there
is a disconnect between those methods and the design software. Not anymore. Now you can:

   •   Link analog tests across multiple designers within a company to the highest level
        specifications of the circuit and view that data in a single, easy-to-use cockpit

   •   View test pass/fail results across an entire design team

   •   Updates are automatically reflected in the cockpit

   •   Use regression testing to build a bridge to the digital world in support of mixed-signal
        verification


Virtuoso Variation Option

Use the Virtuoso Variation Option to discover areas where the variance of your design could
ruin your results:

   •   Simple-to-use, task-driven user interface minimizes set-up time

   •   Fast Monte Carlo analysis employs high-performance sampling methods to efficiently
        verify yield or create corners, with additional speed-up for FinFETs

   •   High-yield estimation lets you efficiently analyze the 5- or 6-sigma boundaries of your
        design

   •   One-button click to create worst-case 3-sigma corners

   •   Statistically based mismatch and sensitivity analyses

Virtuoso ADE Product Suite