Abstract
It has been widely accepted that to ensure good yield in IC wafer manufacturing, early adaptation of DFM（Design for Manufacturability）guidelines in design phase is required and it is particularly true in Foundry business. Integrated foundry approaches for DFM guideline development were presented in this paper. With emphasis of process variations and process sensitivity impact on design patterns, we describe the procedure of the combination of rule-based and simulation-based lithographical hotspot pattern characterizations. An evaluation of process sensitivity metrics for analyzing potential pattern hotspots is then described. In addition, based on hotspot pattern severity, repeated patterns from different designs are saved into a pattern library as knowledge deposition tool and those patterns can be easily identified later in new designs through pattern search, which is much faster than simulation based hotspot detections.
With this approach, a set of DFM compliance rules is derived to designs in the design implementation stage for both 110nm and 90nm technology nodes, striving to gain more yield, device performance, and improve time-to-volume production.
Keywords：DFM（Design for Manufacturability）, Simulation based hot spot detecting, DMF pattern library, Scoring index, hot spot fixing
