Abstract
As the advent of advanced process technology such as 90-nm and below, the design rules become more and more complicated than before. These complicated design rules can guarantee process margin for the most layout environments. However, some layouts have narrow process windows that were still within the design rules. For example, line end layouts in a dense environment would generally have narrower process window than that of the onedimensional（1-D）dense line environment. The dense line end spacing design rule would be larger than that of the 1-D dense line spacing to compensate for the narrow window effect.
In this work, an optical simulation software was used to examine an existing 90-nm FPGA product pre-OPC layout for its optical contrast. The optical contrast could correlate to the depth of focus（DOF）process window. Several back end locations were identified with possible narrow DOF windows. From the evaluations of these low contrast patterns, several design for manufacturing（DFM）rules and DRC deck was then developed. This deck effectively identified the narrow process window layout locations, previously found with the simulation software. These locations were then optimized for the improved DOF windows.
Both simulation and in-line data showed that the DOF window was improved after the layout optimization. Product data with optimized layouts also showed the improved yield.
Key words：DFM, OPC, MEEF, Lithography.
