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The Advanced eXtensible Interface General Purpose Input/Output (AXI GPIO) core provides a general purpose input/output interface to the AXI interface. This 32-bit soft IP core is designed to interface with the AXI4-Lite interface.
Key features are: • Supports the AXI4-Lite interface specification • Supports configurable single or dual GPIO channel (s) • Supports configurable channel width for GPIO pins from 1 to 32 bits • Supports dynamic programming of each GPIO bit as input or output • Supports individual configuration of each channel • Supports independent reset values for each bit of all registers • Supports optional interrupt request generation
Documentation The COTS version v1.01.b is the baseline from which the DO-254 AXI General Purpose Input/Output (GPIO) 1.00a comes from. Logicircuit applies the DO-254 lifecycle to this COTS version. As a result of this DO-254 process, the source code will be modified with the goal of achieving 100% code coverage, and the resulting code will be named DO-254 AXI General Purpose Input/Output (GPIO)1.00a. Below are links to the Xilinx® Product Data for the version that was used as the basis, and the Logicircuit Data Sheet of the resulting DO-254 product.
Link to the Xilinx® Product Specification Link to the Logicircuit Data Sheet: DO-254 AXI General Purpose Input/Output (GPIO) 1.00a Data Sheet
Device Family Support Xilinx® Artix™-7 Xilinx® Kintex™-7 Xilinx® Virtex™-7 Xilinx® Zynq™-7000 Xilinx® Spartan®-6
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