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Controller IP for PCIe 5.0, 4.0, 3.1/3.0 Supporting Root Port, Endpoint, Dual-mode, Switch Port Configurations, with Native User Interface
XpressRICH™ is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. The XpressRICH Controller IP for PCIe 5.0 is compliant with the PCI Express 5.0, 4.0, and 3.1/3.0 specifications, as well as with version 5.x of the PHY Interface for PCI Express (PIPE) specification. The IP can be configured to support endpoint, root port, switch port, and dual-mode topologies, allowing for a variety of use models. The provided Graphical User Interface (GUI) Wizard allows designers to tailor the IP to their exact requirements, by enabling, disabling, and adjusting a vast array of parameters, including data path size, PIPE interface width, low power support, SR-IOV, ECC, AER, etc. for optimal throughput, latency, size and power. PLDA is working hand in hand with multiple PHY IP vendors and Verification IP vendors to offer a range of integrated solutions for PCIe 5.0 at 32GT/s. PLDA XpressRICH Controller IP for PCIe 5.0 is the #1 choice for ASIC, SoC and FPGA designers looking for an enterprise-class PCIe interface solution with a high-performance, low-latency, and flexible user interface allowing for a variety of use models.
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