The NVMe IP core designed by IP-Maker is a powerful data transfer manager integrated into the PCIe SSD Controller between the communication interface and the Nandflash controller, therefore off-loading the host CPU.

The high level of integration provides very low power consumption, the automatic command processing reduces dramatically the latency, and the multi-channel DMA is able to saturate the PCIe bus. That makes a high performance solution for current NandFlash-based SSD, and it is ready to sustain the performances of the next generation of Non-Volatile memory such as MRAM and RRAM.

Using pre-validated NVMe IP core, allows greatly reduced time-to-market for storage OEMs designing in a powerful data transfer manager. The IP-Maker NVMe IP core is fully-featured and easy to use in FPGA and SoC designs.






Reference Design

The NVMe IP can be used in both ASIC and FPGA. It has been ported and validated on the Xilinx 7-series FPGAs. For evaluation and demonstration purpose, the following reference design is available using the Zynq development kit ZC706 from Xilinx.





Key Features

      ☆ Up to 65536 I/O queues
      ☆ Weighted round robin queue arbitration support
      ☆ All commands/log management
      ☆ Legacy interrupt/MSI/MSI-X support
      ☆ Full NVMe registers support
      ☆ Automatic NVMe command execution without CPU use
      ☆ full AXI interfacing
      ☆ Asynchronous event management 



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