Controller IP for PCIe 5.0, 4.0, 3.1/3.0 Supporting Root Port, Endpoint,
Dual-mode Configurations, with Built-in Many-Channel DMA (vDMA),
Legacy DMA, and Configurable AMBA AXI Interconnect 


XpressRICH-AXI™ is a configurable and scalable PCIe controller Soft IP designed for
ASIC and FPGA implementation. The XpressRICH-AXI Controller IP for PCIe 5.0 is
compliant with the PCI Express 5.0, 4.0, and 3.1/3.0 specifications, as well as with
the PHY Interface for PCI Express (PIPE) specification and the AMBA® AXI™ Protocol
Specification. The IP can be configured to support endpoint, root port, and dual-mode
topologies, allowing for a variety of use models, and exposes a configurable, flexible
AMBA AXI interconnect interface to the user. The provided Graphical User Interface
(GUI) Wizard allows designers to tailor the IP to their exact requirements, by enabling,
disabling, and adjusting a vast array of parameters, including number, type, and width
of AXI interfaces, PIPE interface width, low power support, SR-IOV, ECC, AER, etc. for
optimal throughput, latency, size and power. Users may optionally enable one of two
built-in DMA engines based on the application requirements. PLDA is working hand in
hand with multiple PHY IP vendors and Verification IP vendors to offer a range of
integrated solutions for PCIe 5.0 at 32GT/s. PLDA XpressRICH-AXI Controller IP for
PCIe 5.0 is the #1 choice for ASIC, SoC and FPGA designers looking for an enterprise-class
PCIe interface solution with a high-performance, reliable, and scalable
AMBA 3 AXI/AMBA 4 AXI interconnect. 


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