PLDA XpressLINK™ CXL Controller IP combines an ultra-low
latency implementation with an easy-to-integrate design,
accelerating adoption of CXL in SoC designs






PLDA, leader in high-speed interconnect solutions, announces the
successful CXL™ interoperability with pre-production Intel Xeon
processors code named Sapphire Rapids. The session was
conducted at Intel's Industry Enabling Labs as part of a long-term
collaboration between PLDA and Intel's industry enabling group. It
resulted in demonstrated interoperability between PLDA's
XpressLINK™ CXL IP, running on a PLDA FPGA-based add-in card,
and Intel's development platform equipped with pre-production
“Sapphire Rapids” processors.


PLDA XpressLINK controller implements the CXL.io, CXL.cache,
and CXL.mem sub-protocols as specified in the recently released
CXL 2.0 Specification, and is already being designed-in at leading
technology companies.


                            Read The Full Article 


 

	XpressLINK Controller IP     for CXL     Controller IP for the     Compute Express Link     (CXL) Specification     supporting CXL.io,     CXL.cache, CXL.mem

                                  XpressLINK Product Page 





 




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