Munich, Germany – December 4th 2020 – Codasip, the leading supplier of
customizable RISC-V® processor IP, today announces three new 64-bit RISC-V
application processor cores: the A70XP™ provides support for RISC-V P extensions, 
and the A70X MP™ and A70XP MP™ enable the creation of symmetric
multi-processor (SMP) systems.  

	4-core A70X-MP cluster

The RISC-V P extension consists of 331 instructions which can be divided into
groups. The A70XP includes a SIMD unit which executes P extension instructions
with single-cycle latency. Multi-cycle instructions are pipelined to allow one to be
executed every clock cycle. Applications for this core include audio encoding/decoding,
sensor fusion, computer vision, and edge AI/ML applications.


The A70X-MP and A70XP-MP cores add multi-core features to the Codasip application
processor family, supporting clusters of up to four cores in an SMP configuration.
Codasip provides configurable L1 and L2 caches with a scalable microarchitecture. All
Codasip application processors – the A70X™, A70XP, A70X-MP, and A70XP-MP – use
an AXI external interface and support Linux.


Codasip's new family of Application RISC-V processors (names beginning with “A”)
is based on the same microarchitecture as the A70X (Codasip Bk7). All the
Application cores are 64-bit and feature a Floating Point Unit and Atomic instructions.
They also support Machine, Supervisor & User privilege modes and have a Memory
Management Unit, therefore they are able to run Linux. Like other Codasip RISC-V
cores, they are developed using Codasip Studio allowing them to be customized to
meet domain-specific requirements.


“We are delighted to extend our range of Codasip RISC-V application processors with
cores offering higher performance,” said Karel Masařík, CEO Codasip. “These new
cores are the combined work of our new French Design Center and our main R&D
Center in Brno. They will be followed by more exciting new products in 2021.


”The A70X core is available today and the other three cores will be available in the first
quarter of 2021.


Apart from Application, Codasip offers two processor families for the embedded domain:
Small and efficient Low Power Embedded processors (“L”) and more powerful High
Performance Embedded processors (“H”). These families are based on the Codasip
Bk3 and Bk5 microarchitectures. 

	Codasip RISC-V Processor portfolio

About Codasip
Codasip delivers leading-edge processor IP and high-level design tools, providing IC
designers with all the advantages of the RISC-V open ISA, along with the unique
ability to easily customize the processor IP. As a founding member of the RISC-V
Foundation and a long-term supplier of LLVM and GNU-based processor solutions,
Codasip is committed to open standards for embedded processors. Formed in 2014
and headquartered in Munich, Germany, Codasip currently has offices in Europe and
China, with sales representatives worldwide. For more information about our products
and services, visit www.codasip.com. To learn more about RISC-V, visit www.riscv.org.