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Production-proven CSENT-RX core adds certified Safety-Enhanced version
for automotive sensor-interface designs
Woodcliff Lake, NJ — July 9, 2026 — Semiconductor intellectual property provider CAST
today announced the availability of a Safety-Enhanced version of its SENT/SAE J2716
Receiver IP core that is certified as ISO 26262 ASIL B Ready.
The new certification expands CAST’s growing portfolio of Functional Safety IP cores and
gives automotive ASIC and FPGA developers a compact, low-risk receiver for Single Edge
Nibble Transmission (SENT) sensor interfaces. The SENT Receiver core has been in
production use by multiple customers since 2022, and a leading automotive semiconductor
customer has already selected the new Safety-Enhanced version for two ASIL B projects.
SENT is widely used for reliable, high-resolution digital communication from automotive
sensors to electronic control units. The CAST CSENT-RX core implements a configurable
receiver compliant with the SAE J2716 standard, supporting both synchronous and
asynchronous sensors and enabling data reception from one or multiple sensors over a
single SENT line.
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“Automotive developers increasingly need even small sensor-interface blocks to
fit cleanly into the system safety case,” said Peter Dumin, product manager for
CAST. “Already a proven SENT receiver, the ASIL B Ready Safety-Enhanced
version of the core gives customers the added safety mechanisms,
documentation, and independent certification evidence needed to reduce risk
and accelerate ISO 26262-oriented development.” |
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The CSENT-RX core is now available in two versions: Standard and SafetyEnhanced.
The Safety-Enhanced version implements additional protection mechanisms including
CRC, extended parity, dual modular redundancy where needed, and fault-injection test
support. It includes a Safety Manual; Failure Modes, Effects and Diagnostics Analysis
(FMEDA); and an ASIL B Ready certificate issued by SGS-TÜV Saar GmbH. These
deliverables help customers integrate the core into SoC-level safety analyses more
efficiently and provide stronger evidence for meeting system-level functional safety goals.
Rich SENT Feature Set with Low Host Overhead
CSENT-RX supports SENT fast and slow channels; 4-, 6-, and 8-bit CRC checking;
programmable glitch filtering; all SENT frame types; programmable fast-channel data
length; Short and Enhanced Message Formats for the slow channel; and inverted
SENT protocol operation.
To reduce host-processor load, the core provides fast-channel data mapping and an
optional configurable receive FIFO. An external metadata port allows the system to
add custom timestamps or other metadata into the received data packets. For
synchronous sensors, CSENT-RX can generate programmable trigger pulses activated
through software control or a dedicated hardware input, allowing up to four sensors to
share a single physical SENT connection.
On the system side, CSENT-RX provides a 32-bit AMBA® APB or AXI4-Lite interface
(optionally bridged to AXI5-Lite). It includes synthesis-time-defined reset values for
control registers, a comprehensive interrupt set, and handshaking signals for
integration with an external DMA controller. The design is LINT-clean, scan-ready, and
uses a single clock domain for straightforward ASIC or FPGA implementation.
Technology-agnostic, the CSENT-RX can be mapped to ASIC technologies or any
suitable FPGA device. Standard configurations can be implemented in as few as 6,000
ASIC gates, while Safety-Enhanced ASIL B Ready configurations range from 22,000 –
to 31,000 gates. (See representative ASIC and FPGA results on the product page.)
CAST’s Automotive Interfaces Portfolio
The CSENT-RX core is part of CAST’s Automotive Interfaces IP family, which also
includes a SENT Transmitter and most other popular bus and interface controllers.
The ASIL B Ready CSENT-RX receiver expands CAST’s line of Functional Safety IP
cores for automotive and other safety-critical designs, which includes processor, CAN,
LIN, Ethernet MAC, SafeSPI, serial memory, and other interface cores. These give
system developers a broad source for proven IP blocks that support safetyaware SoC
development.
Availability
The CSENT-RX SENT/SAE J2716 Receiver IP core is available now for ASIC and
FPGA implementations. It is delivered in synthesizable RTL source code or targeted
FPGA netlist form, with a SystemVerilog testbench, sample synthesis and simulation
scripts, documentation, and IP-XACT register definitions. The optional SafetyEnhanced
package adds the Safety Manual, FMEDA, and ASIL B Ready certificate.
For pricing, evaluation options, or technical details, visit the CSENT-RX product page.
About CAST
Computer Aided Software Technologies, Inc. (CAST) is a silicon IP provider founded
in 1993. The company’s ASIC and FPGA IP product line includes microcontrollers and
processors; compression engines for data, images, and video; interfaces for
automotive, aerospace, and other applications; networking stacks and offloading
engines; various common peripheral devices; security primitives and comprehensive
SoC security modules. Learn more by visiting www.cast-inc.com.
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CAST is a trademark of Computer Aided Software Technologies Inc.
Other trademarks are the property of their respective owners.
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