
Whether it is spring or fall where you are, the season is bringing big changes, and so is CAST. Stop by our booth at Embedded World (EW) next week, or just read below for some of the new and exciting semiconductor IP news and products that we'll be showing and discussing there.

Single-Pair Ethernet (SPE)
Alliance, Cores, and Collaboration
Ethernet over an unshielded single twisted pair of wires provides a synchronized, low-latency connection for edge devices using simple |

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cabling that's easier and less expensive to run than traditional coaxial cable. Implementing standards including 10BASE-T1S and 100BASE-T1, SPE is rapidly being adopted for industrial and automotive systems. We have joined the Single Pair Ethernet System Alliance and, with this trade association, are helping guide and promote SPE adoption. |
Our forthcoming SPE-S Switch and existing 1G eMAC and Low-Latency eMAC cores all support SPE. We've recently been working with onsemi, Lattice Semiconductor, Fraunhofer IPMS, Future Electronics, and other vendors to explore and demonstrate the possibilities of SPE. Stop by our EW booth to learn more.

Time-Sensitive Ethernet (TSN)
Cores, Demonstration, and Aeronautics
TSN is rapidly being adopted as a fast, synchronized, low-latency, scheduled backbone for automotive and industrial networks. We offer several TSN switch and endpoint IP cores, and with Lattice, we have developed an informative demonstration system that will be running in their booth at EW.
TSN is also appealing for aeronautic systems and potentially may replace current standards like MIL-STD-1553 and ARINC-664. The standard for Aerospace TSN—the 802.1DP profile —is evolving, and our partner Fraunhofer IPMS is part of this effort. Read the latest in this white paper, Time Sensitive Networking for Aerospace.

SoC Protection: Secure Boot
New GEON™ Secure Boot Hardware Engine
We recently introduced an IP core that implements a hardware engine ensuring that SoC designs execute firmware coming from trusted sources without being modified in any way. GEON-SBoot is a fast, area-efficient, processor-agnostic, off-the-shelf IP subsystem that system developers can readily use to build boot security into SoCs using RISC-V, ARM, or practically any processor. Learn more in our press release or visit the product page.

MIPI: Interface IP
New I3C Basic Secondary Controller
The MIPI Alliance sets standards for the huge mobile ecosystem, including smartphones, wearables, automobiles, laptops, drones, and even medical devices. Through our Alliance membership we're able to develop and provide a variety of MIPI IP cores. |
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The latest is the MIPI I3C Basic Secondary Controller. Learn more on its product page or from our press release. |
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The 2024 Embedded World Exhibition and Conference takes place in Nuremberg, Germany, April 9–11. We'll be in booth 4-569 and hope to see you if you're attending. If you'd like a free pass to the exhibits, go to this online registration page, select Voucher from the menu at the top of the page, and enter our code: ew24518377.

Computer Aided Software Technologies, Inc. — 11 Stonewall Crt., Woodcliff Lake, NJ 07677+1 201.391.8300
Copyright © 2024, CAST, All rights reserved.
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