
The combination of PLDA's PCIe controller and MegaChips' PHY will deliver a complete PCIe subsystem solution on TSMC's 16nm Process Technology
PLDA, the industry leader in PCI Express® IP solutions and MegaChips, a global semiconductor company specializing in ASIC Solution Services, today announced their collaboration to design a combined PCIe Controller IP and PHY IP solution. While the combination is currently targeting the TSMC 16nm process, the PCIe Controller/PHY solution will be easy to port to additional fabs and processes.
PLDA's XpressRICH4 IP is a high performance, low latency, highly-configurable PCI Express Endpoint, Root port, Dual Port and Switch IP, supporting the PCI Express Rev 4.0 specification and backwards-compatible to PCIe 3.1 at 8 GT/s, 5 GT/s, and 2,5 GT/s. It is also available with a built-in DMA and an industry-standard AMBA AXI4 interconnect under its XpressRICH4-AXI version .....
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Come meet the PLDA Team on Tuesday, at TSMC Open Innovation Platform Ecosystem Forum 2018 in China ! - Booth 6
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XpressRICH4
PCIe 4.0, 3.1/3.0 Root Port, Endpoint, Dual- mode, Switch Port Controller IP Core with Native User Interface
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XpressRICH4-AXI
PCIe 4.0, 3.1/3.0 Root Port, Endpoint, Dual- mode, Controller IP Core with Multi- Channel DMA and Configurable AMBA AXI Interconnect
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